The invention generally relates to computer systems and in particular to a scalable computer system.
Modern computer systems are available for a variety of applications, including home use, business applications, servers and mobile computers (laptops, personal digital assistants, etc.). Each application may have different processor, memory and input/output (I/O) requirements. As a result, computer manufacturers typically manufacture different systems for different applications and different requirements. For example, a home personal computer (PC) (e.g., single processor, and very limited I/O and memory capabilities) may have a completely different architecture and capabilities than a server (multi processor, greater I/O and memory capabilities). However, as a particular computer's usage and applications expand, it may be desirable to expand the memory and I/O capabilities of that computer. However, most computer systems are not designed to be significantly upgraded due to inherent architectural limitations. Rather, most current computer systems are fixed capacity systems and cannot be easily expanded or upgraded.
A computer system typically includes a memory controller and an I/O controller. For current systems, the memory controller typically interfaces a fixed amount of memory to the host bus, and the I/O controller typically interfaces a fixed number of I/O buses to the host bus. For example, A PCI-to-host bridge may interface a Peripheral Component Interface (PCI) bus to the host bus. Typically one bridge is required for each PCI bus. A PCI bus is a high performance, high bandwidth bus configured in accordance with protocols established by the PCI Special Interest Group. The PCI-to-host bridge is provided, in part, to facilitate conversion of data from the PCI format to a format employed by the host bus. The only technique available to increase memory and I/O capabilities is to add additional controllers or components to the host bus. However, many state of the art host buses are highly sensitive to the number of components, such as bridges, connected to the host bus. With such buses the maximum permissible clock rate is often inversely proportional to the number of components connected to the host bus due to the electrical load supplied by each component. Accordingly, the connection of additional bridges or component directly to the host bus results in a lowering of the maximum permissible clock rate, thereby lowering the overall performance of the system. As a result, the connection of an additional PCI bridge may lower the maximum permissible bus rate to a level which significantly hinders the performance of the overall computer system. Thus, a user is typically forced to purchase a new computer system to obtain significant additional I/O and memory capabilities. Therefore, there is a need for a computer system that is more flexible and can be expanded more easily to meet the growing memory and I/O needs without significantly degrading system performance.